I received B.S. and M.S. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea in 2006 and 2008, respectively, and received Ph.D. degree in electrical engineering at the University of Southern California (USC), Los Angeles, CA, USA in 2019. From 2008 to 2012, I was with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, as a full-time researcher. During 2017 Fall, I was an Graduate Intern with the Data Center Group, Intel Corporation, Santa Clara, CA, USA, worked on the next generation high-speed I/O architectures. From 2019 to 2020 July, I was an analog engineer at Intel corporation LTD I/O circuit Technology team. Currently, I am an Assistant Professor at Department of Electronic IT-Media Engineering, Seoul National University of Science and Technology (SeoulTech). My current research interests include designing low-power high-speed high-resolution analog-to-digital data converters, and high-speed I/O interface circuits.​




Mixed-signal Integrated Circuit Design

University of Southern California, CA, US

M.S. in Electrical and Computer Engineering

Ph.D. Candidate in ECE-Electrophysics (2012-Present)

Thesis: Energy-Efficient Design Techniques and Architectures for High-speed (GS/s) Analog-to-Digital Converters

  • Low-power / High-resolution ADC for RF-sampling

  • High-speed ADC-based Wireline SerDes

  • Digitally assisted AFE circuit design

  • Data converter-based systems

  • Sensor-interface ROIC (image/audio/display/motor)

  • Design Automation leveraging Machine Learning

  • USC Viterbi School of Engineering Ph.D. Fellowship

  • President Award, KAIST (2006)

  • President Award, ETRI (2009)​

  • IEEE CICC 2019 Best Student Paper Award

KAIST, South Korea (former ICU)

B.S. (2006) and M.S. (2008)

in Electrical Communication Engineering

Thesis: Systematic power optimizing cyclic ADC design

ETRI, Daejeon, South Korea

   Graduate Intern (2006.Oct. - 2007.Oct)

   Research Staff (2008.Feb. - 2012.June)

Intel corporation (DCG), Santa Clara CA, US

   Graduate Intern (2017. Oct - 2017. Dec)

Intel corporation LTD AD, Hillsboro OR, US

   Analog Engineer (2019. Sept - 2020. July)